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  this is information on a product in full production. february 2015 docid023282 rev 6 1/20 1 VNLD5300-E omnifet iii fully protected low-side driver datasheet - production data features ? drain current: 2 a ? esd protection ? overvoltage clamp ? thermal shutdown ? current and power limitation ? very low standby current ? very low electromagnetic susceptibility ? compliant with european directive 2002/95/ec ? open drain status output description the VNLD5300-E is a monolithic device made using stmicroelectronics ? vipower ? technology, intended for driving resistive or inductive loads with one side connected to the battery. built-in thermal shutdown protects the chip from overtemperature and short-circuit. output current limitation protects the device in an overload condition. in case of long duration overload, the device limits the dissipated power to a safe level up to thermal shutdown intervention.thermal shutdown, with automatic restart, allows the device to recover normal operation as soon as a fault condition disappears. fast demagnetization of inductive loads is achieved at turn-off. type v clamp r ds(on) i d VNLD5300-E 41 v 300 m 2 a so-8 table 1. devices summary package order codes tube tape and reel so-8 VNLD5300-E vnld5300tr-e www.st.com
contents VNLD5300-E 2/20 docid023282 rev 6 contents 1 block diagrams and pins configurations . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 mcu i/o protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4 package and pc board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.1 so-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.2 so-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.3 so-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
docid023282 rev 6 3/20 VNLD5300-E list of tables 3 list of tables table 1. devices summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. suggested connections for unused and n.c. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 6. powermos section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 7. source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 8. input section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 9. status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 10. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 11. protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 12. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 13. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 14. so-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 15. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
list of figures VNLD5300-E 4/20 docid023282 rev 6 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. configuration diagrams (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 7. so-8 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 8. rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 13 figure 9. so-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 10. thermal fitting model of a lsd in so-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 11. so-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 12. so-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 13. so-8 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 8
docid023282 rev 6 5/20 VNLD5300-E block diagrams and pins configurations 19 1 block diagrams and pins configurations figure 1. block diagram table 2. pin function name function in 1,2 /vsupply 1,2 voltage controlled input pin with hysteresis, cmos compatible. they control output switch state. drain 1,2 powermos drain. source 1,2 powermos source and ground reference for the control section. status 1,2 open drain digital diagnostic pin. ("1($'5 $ 5$,1 /2*,& '5,9(5 &xuuhqw /lplwdwlrq 3rzhu &odps 2))6wdwh 2shqordg 29(57(03(5$785( 3527(&7,21 29(5/2$'3527(&7,21 $&7,9(32:(5/,0,7$7,21 ,196833/< 67$786 6285&( 67$786 ,196833/< $pouspm%jbhoptujddi $pouspm%jbhoptujddi 6285&( '5$,1
block diagrams and pins configurations VNLD5300-E 6/20 docid023282 rev 6 figure 2. current and voltage conventions figure 3. configuration diagrams (top view) table 3. suggested connections for unused and n.c. pins connection / pin status 1,2 n.c. input 1,2 floating x (1) 1. x: do not care. xx to ground not allowed x through 10 k resistor */   74611-:   %3"*/   4063$&   45"564   * % 7 %4 * 45"5 * */ 7 */ 7 45"5 ("1($'5 3/  '5$,1 '5$,1 6285&( 6285&( 67$786 67$786 ,196833/<  ,196833/<         *$3*&)7        
docid023282 rev 6 7/20 VNLD5300-E electical specifications 19 2 electical specifications 2.1 absolute maximum ratings stressing the device above the rating listed in ta ble 4 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2.2 thermal data table 4. absolute maximum ratings symbol parameter value unit v ds drain-source voltage (v in = 0 v) internally clamped v i d dc drain current internally limited a -i d reverse dc drain current 6 a i s dc supply current -1 to 10 ma i in dc input current -1 to 10 ma i stat dc status current -1 to 10 ma v esd1 electrostatic discharge (r = 1.5 k ; c = 100 pf) ? drain ? supply, input, status 5000 4000 v v esd2 electrostatic discharge on output pin only (r = 330 , c = 150 pf) 2000 v t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c e as single pulse avalanche energy (l = 19 mh, t j = 150c, r l =0, i out = i liml ) 26 mj table 5. thermal data symbol parameter maximum value unit r thj-amb thermal resistance junction-ambient 115 c/w
electical specifications VNLD5300-E 8/20 docid023282 rev 6 2.3 electrical characteristics values specified in this section are for v supply =v in = 4.5 v to 5.5 v, -40c < t j < 150c, unless otherwise stated. table 6. powermos section symbol parameter test conditions min. typ. max. unit r on on-state resistance i d = 0.8 a; t j =25c; v supply =v in =4.5 v 300 m i d = 0.8 a; t j = 150c; v supply =v in =4.5v 600 v clamp drain-source clamp voltage v in =5v; i d =0.8a 41 46 52 v v clth drain-source clamp threshold voltage v in =0v; i d =2ma 36 v i dss off-state output current v in =0v; v ds =13v; t j =25c 0 3 a v in =0v; v ds =13v; t j = 125c 0 5 table 7. source drain diode symbol parameter test conditions min. typ. max. unit v sd forward on voltage i d = 0.8 a; v in =0v ? 0.8 ? v table 8. input section symbol parameter test conditions min. typ. max. unit i iss supply current from input pin on-state: v supply =v in =5v; v ds =0v 30 65 a off-state; t j =25c; v in =v drain =0v; v icl input clamp voltage i s =1ma 5.5 7 v i s =-1ma -0.7 v inth input threshold voltage v ds =v in ; i d =1ma 1 3.5 v table 9. status pin symbol parameter test conditions min. typ. max. unit v stat status low output voltage i stat =1ma 0.5 v i lstat status leakage current normal operation; v stat =5v 10 a c stat status pin input capacitance normal operation; v stat =5v 100 pf v stcl status clamp voltage i stat =1ma 5.5 7 v i stat =-1ma -0.7
docid023282 rev 6 9/20 VNLD5300-E electical specifications 19 table 10. switching characteristics (1) 1. see figure 5: application schematic . symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time r l =16 , v cc =13v (2) 2. see figure 4: switching characteristics . ?6?s t d(off) turn-off delay time r l =16 , v cc =13v (2) ?3?s t r rise time r l =16 , v cc =13v (2) ?11?s t f fall time r l =16 , v cc =13v (2) ?3?s w on switching energy losses at turn-on r l =16 , v cc =13v (2) ?0.028? mj w off switching energy losses at turn-off r l =16 , v cc =13v (2) ?0.006? mj q g total gate charge v supply =v in = 5 v ? 0.6 ? nc table 11. protection and diagnostics symbol parameter test conditions min. typ. max. unit i limh dc short-circuit current v ds = 13 v; v supply =v in =5v 22.83.8a i liml short-circuit current during thermal cycling v ds =13v; t r electical specifications VNLD5300-E 10/20 docid023282 rev 6 figure 4. switching characteristics ) ' 9 jhq w g rq w g rii w u w i   *$3*&)7
docid023282 rev 6 11/20 VNLD5300-E application information 19 3 application information figure 5. application schematic 3.1 mcu i/o protection st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/o pins from latching up (a) . the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the lsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os: equation 1: let: ? i latchup > 20 ma ? v ohc > 4.5 v ? 35 ? r prot 100 k then, the recommended value is r prot =1k figure 6 shows the turn-off current drawn during the demagnetization. ("1($'5 ,196833/< 9 67$786 '5$,1 6285&( 5surw 5 / 9ff 0lfur&rqwuroohu 5surw 9 a. in case of negative transient on the drain pin. 0.7 i latchup -------------------- r prot v oh c v ih ? () i ih max --------------------------------------- - ?
application information VNLD5300-E 12/20 docid023282 rev 6 figure 6. maximum demagnetization energy 1. values are generated with r l =0 . in case of repetitive pulses, t jstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specif ied above for curves a and b. 0.1 1 10 1 10 100 1000 i(a) l(mh) vnld5300 - maximum turn off current versus inductance vnld5300 - single pulse repetitive pulse tjstart=100c repetitive pulse tjstart=125c 1 10 100 1000 0.01 0.1 1 10 100 e[mj] tdemag [ms] vnld5300 - maximum turn off energy versus tdemag vnld5300 - single pulse repetitive pulse tjstart=100c repetitive pulse tjstart=125c gapg1107131351cft
docid023282 rev 6 13/20 VNLD5300-E package and pc board thermal data 19 4 package and pc board thermal data 4.1 so-8 thermal data figure 7. so-8 pc board 1. layout condition of r th and z th measurements (board finish thickness 1.6 mm +/- 10%; board double layer; board dimension 78 mm x 86 mm; board material fr 4; cu thickness 0.070 mm (front and back side); thermal vias separation 1.2 mm; thermal via diamet er 0.3 mm +/- 0.08 mm; cu thickness on vias 0.025 mm). figure 8. r thj-amb vs pcb copper area in open box free air condition ("1($'5         57+mdpe 1$#$vifbutjolbsfb dn?
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package and pc board thermal data VNLD5300-E 14/20 docid023282 rev 6 figure 9. so-8 thermal impeda nce junction ambient single pulse equation 2: where = t p /t figure 10. thermal fitting model of a lsd in so-8 note: the fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.           =7+ ?&: 7lph v &x irrwsulqw &x fp *$3*&)7 z th r th ? z thtp 1 ? () + = ("1($'5
docid023282 rev 6 15/20 VNLD5300-E package and pc board thermal data 19 table 13. thermal parameters area/island (cm 2 ) footprint 2 r1 = r7 (c/w) 2.8 2.8 r2 = r8 (c/w) 3.7 3.7 r3 = r9 (c/w) 3.5 3.5 r4 = r10 (c/w) 34 25 r5 (c/w) 36 20 r6 (c/w) 35 27 c1 = c7 (w.s/c) 0.00002 0.00002 c2 = c8 (w.s/c) 0.001 0.001 c3 = c9 (w.s/c) 0.005 0.005 c4 = c10 (w.s/c) 0.02 0.02 c5 (w.s/c) 0.15 0.15 c6 (w.s/c) 2.5 3.5
package and packing information VNLD5300-E 16/20 docid023282 rev 6 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 so-8 mechanical data figure 11. so-8 package dimensions gapgcft00145
docid023282 rev 6 17/20 VNLD5300-E package and packing information 19 table 14. so-8 mechanical data symbol millimeters min. typ. max. a 1.75 a1 0.10 0.25 a2 1.25 b0.28 0.48 c0.17 0.23 d (1) 1. dimensions d does not include mold flash, protrusions or gate burrs. mold flash, potrusions or gate burrs shall not exceed 0.15 mm in total (both side). 4.80 4.90 5.00 e 5.80 6.00 6.20 e1 (2) 2. dimension ?e1? does not include in terlead flash or protrusions. interl ead flash or protrusions shall not exceed 0.25 mm per side. 3.80 3.90 4.00 e1.27 h0.25 0.50 l0.40 1.27 l1 1.04 k0 8 ccc 0.10
package and packing information VNLD5300-E 18/20 docid023282 rev 6 5.3 so-8 packing information figure 12. so-8 tube shipment (no suffix) figure 13. so-8 tape and reel shipment (suffix ?tr?) all dimensions are in mm. base q.ty 100 bulk q.ty 2000 tube length ( 0.5) 532 a 3.2 b 6 c ( 0.1) 0.6 c b a tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 12 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d (+ 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 5.5 compartment depth k (max) 4.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions all dimensions are in mm. base q.ty 2500 bulk q.ty 2500 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 12.4 n (min) 60 t (max) 18.4
docid023282 rev 6 19/20 VNLD5300-E revision history 19 6 revision history table 15. document revision history date revision changes 28-jun-2012 1 initial release. 25-mar-2013 2 table 6: powermos section : ?r on : added typical value, removed maximum value table 10: switching characteristics : ? updated typical values table 11: protection and diagnostics : ?t dliml : updated typical value table 12: truth table : ? output voltage < v ol : removed conditions 05-jun-2013 3 table 5: thermal data : ?r thj-amb : updated value table 6: powermos section : ?v clamp : updated test conditions table 8: input section : ?i iss : updated value updated section 3.1: mcu i/o protection updated chapter 4: package and pc board thermal data 18-jul-2013 4 table 4: absolute maximum ratings : ?-i d : updated value ?e as : updated parameter value table 10: switching characteristics : ?t d(on) , t r , t f , w on , w off : updated typical values added figure 6: maximum demagnetization energy 18-sep-2013 5 updated disclaimer. 26-feb-2015 6 updated figure 5: application schematic
VNLD5300-E 20/20 docid023282 rev 6 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved


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